Senior ASIC - FPGA Design and Verification Engineer
Location: El Segundo
Posted on: February 24, 2021
Boeing Defense Space & Security seeks-Senior-Digital ASIC - FPGA
Design and Verification Engineers to support the Satellite
Capabilities organization and multiple satellite product lines
based in El Segundo, CA.---------------------Position
- Leads design and verification engineers, reporting status to
- Resolves complex issues on critical programs related to
architectural approaches, requirements, specifications and design.
Leads technical aspect of proposal preparation.
- Identifies critical performance measures and develops processes
for computing them.
- Leads activities in support of Supplier Management with
make/buy recommendations and other technical services.
- Coordinates engineering support throughout the lifecycle of the
- Develops new concepts for future product designs to meet
- Evaluates and integrates third-party IP and verification IP
- Provides basic engineering support throughout the lifecycle of
- Conducts trade studies and literature research to support
future product designs.
- Stays current on new technologies and best practices.
- Works under consultative direction.This position must meet
Export Control compliance requirements, therefore a -US Person- as
defined by 22 C.F.R. - 120.15 is required. -US Person- includes US
Citizen, lawful permanent resident, refugee, or asylee.Basic
Qualifications (Required Skills/Experience):-
- Bachelor, Master or Doctorate of Science degree from an
accredited course of study, in engineering, computer science,
mathematics, physics or chemistry
- 10-or more years' of experience in Digital ASIC design and
- Work experience using Verliog or SystemVerilog.Preferred
Qualifications (Desired Skills/Experience):
- Bachelor's degree and 18 or more years' experience in digital
ASIC/FPGA design and verification, Master's degree with 16 or more
years' experience in digital design/verification, or PhD degree
with 13 years of experience in digital design/verification.
- Experience leading a team of design and verification engineers,
reporting status to program management.
- Experience working other engineering teams (e.g. board
designers, system engineers, requirement engineers, reliability
engineers, microprocessor/software engineers), to ensure the
ASIC/FPGA functions safely and reliably when deployed by assisting
in Worst Case Circuit Analysis, IO timing, IO type selection, life
analysis, software con-ops, MTBF analysis, etc.
- Experience creating and improving department process guidelines
and procedures (e.g. engineering standards, checklists, process
- Experience evaluating and recommending technology that is new
to the organization.
- Experience leading development of architectural approaches from
customer and system requirements.
- Experience designing digital ASIC/FPGA architectural design
documents (micro-architecture documents with timing diagrams,
detailed design blocks, etc.).
- Experience deriving digital ASIC/FPGA requirements
specification from higher-level (system or board-level)
- Experience identifying, tracking, and providing status of
technical performance metrics to measure progress and ensure
compliance with requirements.
- Experience developing complex and high data rate designs.
- Work experience performing RTL synthesis.
- Work experience performing clock cross domain analysis
- Work experience performing Static Timing Analysis and
correcting timing violations.
- Work experience writing Universal Verification Methodology
(UVM) sequences and virtual sequences.
- Work experience using Linux or Unix terminal commands.
- Experience using scripting languages: Make, Perl, Python, shell
- Experience using Revision Control Systems: Subversion (SVN),
- Work experience simulating a digital design using SystemVerilog
- Work experience using Object Oriented Programming concepts:
Inheritance, Polymorphism, etc.
- Work experience using Universal Verification Methodology (UVM):
Experience creating drivers, monitors, predictors, and
- Work experience creating a self-checking simulation testbench
- Experience mentoring junior engineers.This position offers
relocation based on candidate eligibility. Basic relocation is
available for internal candidates.Typical Education and
ExperienceEducation/experience typically acquired through advanced
technical education from an accredited course of study in
engineering, computer science, mathematics, physics or chemistry
(e.g. Bachelor) and typically 14 or more years' related work
experience or an equivalent combination of technical education and
experience (e.g. PhD+9 years' related work experience, Master+12
years' related work experience). In the USA, ABET accreditation is
the preferred, although not required, accreditation.Boeing is a
Drug Free Workplace where post offer applicants and employees are
subject to testing for marijuana, cocaine, opioids, amphetamines,
PCP, and alcohol when criteria is met as outlined in our
Keywords: BOEING, Los Angeles , Senior ASIC - FPGA Design and Verification Engineer, Engineering , El Segundo, California
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